Research Projects
Embedded systems implement many math-heavy algorithms. Reverse engineering embedded device binaries is not a simple decompilation of assembly to C code. The REMaQE framework is intended to extract the math equations from the implemented binary using symbolic execution and dynamic analysis.
Cache side channels are well known for being effective in extracting data from modern cryptographic ciphers. Some other hardware accessing the cache, e.g. prefetcher, degrades the quality of the side channel by introducing false positives in the attacker’s data. This project works on a method to disable the prefetcher by preventing it from generating memory accesses and interfering with side channels running in the cache.
Reorder buffer is an important component of an Out-of-Order core utilised in the Tomasulo algorithm. In an SMT context, this Reorder Buffer may either be shared among threads or statically partitioned. This allows for a side-channel leakage to occur because a shared Reorder Buffer will lead to interference among the two thread’s IPC.
Heterogeneous-ISA Dynamic Core is a reconfigurable composite core which supports runtime migration between multiple ISAs. Runtime migration needs to ensure the consistency of memory image for both ISAs. This project implements a methodology for Exection Migration of HIDC between x86 and ARM ISAs. To harness the benefits of ISA diversity fully, execution migration cost needs to be low enough so that frequent migration can be justified performance-wise.